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     <!ENTITY ocyc "http://sw.opencyc.org/concept/" >
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<rdf:RDF xml:base="http://sw.opencyc.org/2008/06/10/concept/"
         xmlns="http://sw.opencyc.org/2008/06/10/concept/"
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  <owl:Ontology rdf:about="http://sw.opencyc.org/2008/06/10/concept/">
    <owl:versionInfo>2008/06/10</owl:versionInfo>
    <rdfs:comment xml:lang="en">

      OpenCyc Knowledge Base

      Copyright© 2001-2008 Cycorp, Inc., http://www.cyc.com/, Austin, TX, USA

      This file contains an OWL representation of information contained 
      in the OpenCyc Knowledge Base. The content of this OWL file is 
      licensed under the Creative Commons Attribution 3.0 license whose 
      text can be found at http://creativecommons.org/licenses/by/3.0/legalcode. 
      The content of this OWL file, including the OpenCyc content it represents, 
      constitutes the "Work" referred to in the Creative Commons license. The terms of 
      this license equally apply to, without limitation, renamings and other 
      logically equivalent reformulations of the content of this OWL file 
      (or portions thereof) in any natural or formal language, as well 
      as to derivations of this content or inclusion of it in other ontologies.

    </rdfs:comment>
  </owl:Ontology>

  <owl:AnnotationProperty rdf:about="http://sw.cyc.com/CycAnnotations_v1#externalID">
    <rdfs:label xml:lang="en">externalID</rdfs:label>
    <rdfs:comment xml:lang="en">
      A unique, language-neutral, variable-sized identifier
      for a concept that can be used to refer unambiguously to that concept across 
      OWL exports or across Cyc inference engines.
    </rdfs:comment>
    <rdf:type rdf:resource="http://www.w3.org/2002/07/owl#FunctionalProperty"/>
  </owl:AnnotationProperty>

  <owl:AnnotationProperty rdf:about="http://sw.cyc.com/CycAnnotations_v1#label">
    <rdfs:label xml:lang="en">label</rdfs:label>
    <rdfs:comment xml:lang="en">
      A natural-language representation for a concept that is both human 
      readable and readable by the Cyc inference engine. These terms are not 
      guaranteed to refer to the same concept across time but are guaranteed to
      be consistent within a particular OWL export. Use 'cycAnnot:externalID'
      for unambiguously referring to a concept across OWL exports or across Cyc
      inference engines.
    </rdfs:comment>
  </owl:AnnotationProperty>

  <owl:Class rdf:about="Mx4r4m4r4HSwEdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">computer architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">ComputerTypeByArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">A specialization of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4No51nSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByHardware&lt;/a&gt;. Each instance of this collection is a variety of  computer processor architecture -- for instance &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt;. Notable specializations of this collection are &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvw_evnS_EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;CISCArchitecture&lt;/a&gt;.</rdfs:comment>
    <rdfs:subClassOf rdf:resource="Mx4r4No51nSwEdaAAACgyZzFrg"/>
    <rdfs:subClassOf rdf:resource="Mx4rv1fLiZwpEbGdrcN5Y29ycA"/>
    <rdf:type rdf:resource="Mx4rvprlOZwpEbGdrcN5Y29ycA"/>
    <owl:sameAs rdf:resource="http://dbpedia.org/resource/Computer_architecture"/>
    <owl:sameAs rdf:resource="&ocyc;Mx4r4m4r4HSwEdaAAACgyZzFrg"/>
    <owl:sameAs rdf:resource="&cyc;Mx4r4m4r4HSwEdaAAACgyZzFrg"/>
    <wikipediaArticleURL>http://en.wikipedia.org/wiki/Computer_architecture</wikipediaArticleURL>
    <Mx4rwLSVCpwpEbGdrcN5Y29ycA xml:lang="en">architectures</Mx4rwLSVCpwpEbGdrcN5Y29ycA>
    <Mx4rwLSVCpwpEbGdrcN5Y29ycA xml:lang="en">architecture</Mx4rwLSVCpwpEbGdrcN5Y29ycA>
    <Mx4rwLSVCpwpEbGdrcN5Y29ycA xml:lang="en">computer system architecture</Mx4rwLSVCpwpEbGdrcN5Y29ycA>
  </owl:Class>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rVAW-SHS8EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">SPARC chip architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">SPARCProcessorArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">The collection of all SPARC chip architecture computers. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt;. &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rVAW-SHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;SPARCProcessorArchitecture&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;, a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;, a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rv-mZoMnYQdeTy5d-IY_eBg&quot; class=&quot;cyc_term&quot;&gt;ManufacturedGoodsType&lt;/a&gt;, and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvom2E5wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;ProductTypeByBrand&lt;/a&gt;.</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4r-KxW0nS8EdaAAACgyZzFrg">
    <cycAnnot:label xml:lang="en">ARMProcessorArchitecture</cycAnnot:label>
    <rdfs:label xml:lang="en">ARM processor architecture</rdfs:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4r2gF8knS-EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">Power PC processor architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">PowerPCArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">An instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;. &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r2gF8knS-EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;PowerPCArchitecture&lt;/a&gt; pertains to computers which have a PowerPC chip -- developed jointly by IBM, Apple and Motorola.  This chip was initially to be found in &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvViMoJwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;IBMComputer&lt;/a&gt;s and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvViqupwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;MacintoshComputer&lt;/a&gt;s, but seems to have survived only in the Mac.</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rHpUM4HS9EdaAAACgyZzFrg">
    <rdfs:comment xml:lang="en">An instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;. &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rHpUM4HS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;AlphaProcessorArchitecture&lt;/a&gt; is a type of RISC computer processor architecture, produced by &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVjYHZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;CompaqInc&lt;/a&gt;.</rdfs:comment>
    <rdfs:label xml:lang="en">Alpha chip architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">AlphaProcessorArchitecture</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rM6NltnTAEdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">microchannel thing</rdfs:label>
    <rdfs:comment xml:lang="en">The collection of all microchannel microprocessors. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVit45wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Microprocessor&lt;/a&gt;. The concept &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rM6NltnTAEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;Microchannel&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt; and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;.</rdfs:comment>
    <cycAnnot:label xml:lang="en">Microchannel</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4reAehKHS_EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">vector processor</rdfs:label>
    <cycAnnot:label xml:lang="en">VectorProcessor</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rvkpSOnS-EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">pipeline thing</rdfs:label>
    <cycAnnot:label xml:lang="en">Pipelined</cycAnnot:label>
    <rdfs:comment xml:lang="en">The collection of all pipelined microprocessors. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVit45wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Microprocessor&lt;/a&gt;. The collection &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvkpSOnS-EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;Pipelined&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;, a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;, and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rv-mZoMnYQdeTy5d-IY_eBg&quot; class=&quot;cyc_term&quot;&gt;ManufacturedGoodsType&lt;/a&gt;.</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rQI9TsHS8EdaAAACgyZzFrg">
    <cycAnnot:label xml:lang="en">SerialArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">The collection of all serial architecture microprocessors. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVit45wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Microprocessor&lt;/a&gt;. The collection &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rQI9TsHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;SerialArchitecture&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;, a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;, and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rv-mZoMnYQdeTy5d-IY_eBg&quot; class=&quot;cyc_term&quot;&gt;ManufacturedGoodsType&lt;/a&gt;.</rdfs:comment>
    <rdfs:label xml:lang="en">serial architecture</rdfs:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rzGp32nS7EdaAAACgyZzFrg">
    <cycAnnot:label xml:lang="en">Ia64ProcessorArchitecture</cycAnnot:label>
    <rdfs:label xml:lang="en">Ia64 chip architecture</rdfs:label>
    <rdfs:comment xml:lang="en">An instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;. &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rzGp32nS7EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;Ia64ProcessorArchitecture&lt;/a&gt; is a type of CISC computer chip, produced by &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvcy7rZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;IntelCorporation&lt;/a&gt;, postdating the popular &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt; (which included the Pentium), and released around 2001. It also goes by the name of &amp;quot;Itanium&amp;quot;.</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rGkbP8nS9EdaAAACgyZzFrg">
    <cycAnnot:label xml:lang="en">RISCArchitecture</cycAnnot:label>
    <rdfs:label xml:lang="en">RISC</rdfs:label>
    <rdfs:comment xml:lang="en">A CPU architecture in which the number
 of instructions the processer can execute is minimized to improve processing 
speed (RISC stands for &amp;quot;Reduced Instruction Set&amp;quot;). It is contrasted with 
&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvw_evnS_EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;CISCArchitecture&lt;/a&gt;s (or &amp;quot;Complex Instruction Set&amp;quot; architectures), of which 
Intel architectures are the most notable. RISC architectures include Sun&apos;s SPARC 
(&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rVAW-SHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;SPARCProcessorArchitecture&lt;/a&gt;), Compaq&apos;s Alpha (&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rHpUM4HS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;AlphaProcessorArchitecture&lt;/a&gt;) 
and IBM&apos;s PowerPC (&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r2gF8knS-EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;PowerPCArchitecture&lt;/a&gt;).</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rYt0uiHS8EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">Intel x86 chip architecture</rdfs:label>
    <rdfs:comment xml:lang="en">An instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;. &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt; is a type of CISC computer processor architecture, produced by &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvcy7rZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;IntelCorporation&lt;/a&gt;. It includes the Pentium. For more recent architecture from Intel, see &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rzGp32nS7EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;Ia64ProcessorArchitecture&lt;/a&gt;.</rdfs:comment>
    <cycAnnot:label xml:lang="en">X86ProcessorArchitecture</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4r-8Du1nS9EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">stack architecture</rdfs:label>
    <rdfs:comment xml:lang="en">The attribute which indicates that the computer&apos;s architecture is stack oriented.</rdfs:comment>
    <cycAnnot:label xml:lang="en">StackArchitecture</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rhnBBpnS7EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">register architecture</rdfs:label>
    <rdfs:comment xml:lang="en">The attribute which indicates that the computer&apos;s architecture is register based.</rdfs:comment>
    <cycAnnot:label xml:lang="en">RegisterArchitecture</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rwxbewnS6EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">parallel architecture</rdfs:label>
    <rdfs:comment xml:lang="en">The collection of all parallel architecture. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVit45wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Microprocessor&lt;/a&gt;. The concept &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rwxbewnS6EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ParallelArchitecture&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt; and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;.</rdfs:comment>
    <cycAnnot:label xml:lang="en">ParallelArchitecture</cycAnnot:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rvw_evnS_EdaAAACgyZzFrg">
    <rdfs:comment xml:lang="en">CISC or &amp;quot;Complex Instruction Set&amp;quot; Architecture is
 a CPU architecture in which the number of instructions the processer can 
execute is not minimized in order to improve processing speed, as is the case 
with &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt;s (RISC stands for &amp;quot;Reduced Instruction Set&amp;quot;).
Intel architectures are the most notable instances of this kind of architecture.</rdfs:comment>
    <cycAnnot:label xml:lang="en">CISCArchitecture</cycAnnot:label>
    <rdfs:label xml:lang="en">CISC</rdfs:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4r7ofuNnS9EdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">massively parallel architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">MassivelyParallelArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">The collection of all microprocessors with massively parallel architecture. A type of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVit45wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Microprocessor&lt;/a&gt;. The concept &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r7ofuNnS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;MassivelyParallelArchitecture&lt;/a&gt; is a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4m4r4HSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByArchitecture&lt;/a&gt;, a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rpPHhAOB1EdqAAAACs6hRXg&quot; class=&quot;cyc_term&quot;&gt;SpatiallyDisjointObjectType&lt;/a&gt;, and a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rv-mZoMnYQdeTy5d-IY_eBg&quot; class=&quot;cyc_term&quot;&gt;ManufacturedGoodsType&lt;/a&gt;.</rdfs:comment>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <Mx4r4m4r4HSwEdaAAACgyZzFrg rdf:about="Mx4rakXBzHTAEdaAAACgyZzFrg">
    <rdfs:comment xml:lang="en">A variety of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt; (a computer architecture which uses a so-called &apos;Reduced Instruction Set&apos;), manufactured by MIPS Technologies, Inc.</rdfs:comment>
    <cycAnnot:label xml:lang="en">MIPSArchitecture</cycAnnot:label>
    <rdfs:label xml:lang="en">MIPS processor architecture</rdfs:label>
  </Mx4r4m4r4HSwEdaAAACgyZzFrg>

  <owl:Thing rdf:about="http://dbpedia.org/resource/Computer_architecture">
    <rdfs:label xml:lang="en">computer architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">ComputerTypeByArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">A specialization of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4No51nSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByHardware&lt;/a&gt;. Each instance of this collection is a variety of  computer processor architecture -- for instance &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt;. Notable specializations of this collection are &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvw_evnS_EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;CISCArchitecture&lt;/a&gt;.</rdfs:comment>
  </owl:Thing>

  <owl:ObjectProperty rdf:about="Mx4rwLSVCpwpEbGdrcN5Y29ycA">
    <rdfs:label xml:lang="en">Pretty String</rdfs:label>
    <rdfs:comment xml:lang="en">(&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rwLSVCpwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;prettyString&lt;/a&gt; TERM STRING) means that STRING is the English word or expression (sequence of words) commonly used to refer to TERM.  The predicate &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rwLSVCpwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;prettyString&lt;/a&gt; is used by the code which generates CycL to English paraphrases, but its applicability is not restricted to this use.</rdfs:comment>
    <cycAnnot:label xml:lang="en">prettyString</cycAnnot:label>
  </owl:ObjectProperty>

  <owl:Class rdf:about="Mx4rvprlOZwpEbGdrcN5Y29ycA">
    <rdfs:comment xml:lang="en">A collection of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvtppU5wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;CollectionType&lt;/a&gt;s. Each instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvprlOZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;FacetingCollectionType&lt;/a&gt; is a collection-type that &amp;quot;facets&amp;quot; -- i.e. stands in the &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvjldVJwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;facets_Generic&lt;/a&gt; (q.v.) relation to -- another collection. Examples include &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVibOJwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;AutomobileTypeByBrand&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rANFO8Ec-EdaEKABQ2sS97g&quot; class=&quot;cyc_term&quot;&gt;MusicTypeByGenre&lt;/a&gt;, which facet &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvViVwZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Automobile&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVjOJpwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;Music&lt;/a&gt;, respectively.</rdfs:comment>
    <rdfs:label xml:lang="en">faceting collection type</rdfs:label>
    <cycAnnot:label xml:lang="en">FacetingCollectionType</cycAnnot:label>
  </owl:Class>

  <owl:Class rdf:about="&ocyc;Mx4r4m4r4HSwEdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">computer architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">ComputerTypeByArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">A specialization of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4No51nSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByHardware&lt;/a&gt;. Each instance of this collection is a variety of  computer processor architecture -- for instance &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt;. Notable specializations of this collection are &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvw_evnS_EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;CISCArchitecture&lt;/a&gt;.</rdfs:comment>
  </owl:Class>

  <owl:Class rdf:about="Mx4r4No51nSwEdaAAACgyZzFrg">
    <rdfs:comment xml:lang="en">A collection of collections.  Each instance of  &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4No51nSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByHardware&lt;/a&gt; is a collection of instances of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvViQ2ZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;ComputerHardwareItem&lt;/a&gt; that share some property.</rdfs:comment>
    <rdfs:label xml:lang="en">computer type by hardware</rdfs:label>
    <cycAnnot:label xml:lang="en">ComputerTypeByHardware</cycAnnot:label>
  </owl:Class>

  <owl:Class rdf:about="Mx4rv1fLiZwpEbGdrcN5Y29ycA">
    <cycAnnot:label xml:lang="en">FacetInstanceCollection</cycAnnot:label>
    <rdfs:label xml:lang="en">facet collection</rdfs:label>
    <rdfs:comment xml:lang="en">A &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvtppU5wpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;CollectionType&lt;/a&gt;.  Each instance of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rv1fLiZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;FacetInstanceCollection&lt;/a&gt; is a collection that is an instance of a &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvprlOZwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;FacetingCollectionType&lt;/a&gt; (q.v.).  For example, the facet-instance-collection (&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rBVDJsPLMQdiZD5jLVkyKUw&quot; class=&quot;cyc_term&quot;&gt;WineOfVintageFn&lt;/a&gt; (&lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvVjympwpEbGdrcN5Y29ycA&quot; class=&quot;cyc_term&quot;&gt;YearFn&lt;/a&gt; 1926)) is an instance of the faceting-collection-type &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rWdpZhPLLQdiKEtsuZMndzQ&quot; class=&quot;cyc_term&quot;&gt;WineTypeByVintage&lt;/a&gt;.</rdfs:comment>
  </owl:Class>

  <owl:DataProperty rdf:about="wikipediaArticleURL">
  </owl:DataProperty>

  <owl:Class rdf:about="&cyc;Mx4r4m4r4HSwEdaAAACgyZzFrg">
    <rdfs:label xml:lang="en">computer architecture</rdfs:label>
    <cycAnnot:label xml:lang="en">ComputerTypeByArchitecture</cycAnnot:label>
    <rdfs:comment xml:lang="en">A specialization of &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4r4No51nSwEdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;ComputerTypeByHardware&lt;/a&gt;. Each instance of this collection is a variety of  computer processor architecture -- for instance &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rYt0uiHS8EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;X86ProcessorArchitecture&lt;/a&gt;. Notable specializations of this collection are &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rGkbP8nS9EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;RISCArchitecture&lt;/a&gt; and &lt;a href=&quot;http://sw.opencyc.org/2008/06/10/concept/Mx4rvw_evnS_EdaAAACgyZzFrg&quot; class=&quot;cyc_term&quot;&gt;CISCArchitecture&lt;/a&gt;.</rdfs:comment>
  </owl:Class>

</rdf:RDF>
